Silicon Wafer
Silicon Wafer
Product Detail



Diameter
2"
3"
4"
5"
6"
8"12"
GradePrime
Growth MethodCZ
Orientation<1-0-0>,<1-1-1>,<1-1-0>
Type/DopantP Type/Boron,N Type/Phos,N Type/As,N Type/Sb
Thichness (um)
279
380525
625675725
775
Thichness ToleranceStandard ±25um,Maximum Capabilities ±5um± 20um± 50um
Resistivity(Ohm-cm)0.001-100ohm-cm
Surface FinishedP/E,P/P,E/E,G/G
TTV (um)Standard < 10um, Maximum Capabilities<5um
Bow/Warp (um)Standard < 40um,Maximum Capabilities<20um<40um<40um
Particle<10@0.5um, <10@0.3um, <10@0.2um<30@0.5um


What is the Silicon Wafer?


Definition: the production used semiconductor integrated circuits (IC) or solar cells, because of its shape is round, it is known as the Silicon Wafer. It can be processed into various circuit element structure, and become a specific feature of the IC
electrical products or solar cells.

A wafer is a fairly thin disc of a semiconductor material such as silicon. It is used as a support for the manufacture of microstructures by techniques such as etching, doping, deposition of other materials (epitaxy, sputtering, chemical vapor deposition, etc.) and photolithography. These micro-structures are a major component in the manufacture of integrated circuits, transistors, power semiconductors. The wafers can be of different sizes from 1 inch (25.4 mm) up to 300 mm for a thickness of the order of 0.7 mm. The trend is to use the largest wafers possible to be able to burn more chips simultaneously and limit losses on the edge of the plate, resulting in increased production at a lower cost. This orientation is important because the crystals have anisotropic structural and electronic properties. We print integrated circuits, transistors, and power semiconductors on these tight grid wafers to put as much as possible on a single silicon or semiconductor wafer.

The single crystal

A single crystal (monocrystal), as it is required in semiconductor manufacturing, is a regular arrangement of atoms. There are polycrystalline (composition of many small single crystals) and amorphous silicon (disordered structure). Depending on the orientation of the lattice, silicon wafers have different surface structures which impact various properties as the charge carrier mobility or the behaviour in wet-chemical anisotropic etching of silicon.

Crystal orientation

Crystallographic orientation

In micromechanics the crystal orientation is of particular importance. It allows microchannels with perpendicular walls on (110) silicon, whereas flank angles of 54.74° are possible on (100) orientation.


Czochralski process

The polycrystalline silicon, as it is present after the zone cleaning, is melted in a quartz crucible nearly above the melting point of silicon. Now dopants (e.g. boron or phosphorus) can be added to the melt to achieve appropriate electrical characteristics of the single crystal.

A seed crystal (a perfect single crystal) on a rotating rod is brought to the surface of the silicon melt. This seed crystal pretends the orientation of the silicon crystal. In contact with the seed crystal, the melt overtakes its crystal structure. The fact that the crucible temperature is only slightly above the melting point of silicon, the melt solidifies immediately on the seed and the crystal grows.

The seed is slowly pulled upward with constant rotation, while there is constant contact with the melt. The crucible turns in the opposite direction of the seed crystal. A constant temperature of the melt is essential to ensure a steady growth. The diameter of the single crystal is determined by the drawing speed, which provides 2 to 25 cm/h. The higher the drawing speed, the thinner the crystal. The entire apparatus is located in a controlled atmosphere, so that no oxidation of silicon can take place.

The disadvantage of this procedure is that the melt is accumulated with dopants during the process, since the dopants are more solubly in the melt than in the solid state. Thus the dopant concentration along the silicon rod is not constant. Also impurities or metals can dissolve from the crucible and built into the crystal.

The advantages of this method are the lower costs, and the ability to produce larger wafer sizes as in flot-zone processes.






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